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[News]

  • (12/30) Grading is finalized. Please check your grade in your GLS. Claims should be made by this Thursday.
  • (12/26) Grade F is assigned temporarily to all students. An announcement will be made after finishing grading. Sorry for inconvenience.
  • (12/20) Final exam results are announced (Click here!). (last updated: 12/20)
    – If you want to check your exam paper, please visit the office (Semiconductor Bldg. #400509) at 10:00~12:30 on Monday (12/23) or Tuesday (12/24).
    – If you forgot your secret key, please email the TA. Numbers with bracket indicates the last 4 digits of your student ID.
  • (12/9) The final exam is scheduled at 12:00~13:15 on Dec. 17th in 400112 and 400126. The scope is after the midterm exam to the end of this course. You have a designated seat for the final exam. Please see this. Good luck!!
  • (12/3) PA3 is released. Please check Assignments tab.
  • (11/7) PA2 is released. Please check Assignments tab.
  • (11/5) Midterm results are announced (Click here!). (last updated: 11/12)
    – If you want to check your exam paper, please visit the office (Semiconductor Bldg. #400509) at 15:00~17:30 on Tuesday (11/5) or please email TA if you want to visit on another day (~11/8).
    – If you forgot your secret key, please email the TA. Numbers with bracket indicates the last 4 digits of your student ID.
  • (10/21) Randomly chosen designated seat (Click here!) for the midterm exam (#400126). 
  • (10/14) Our midterm exam is scheduled at 12:00~13:15 on 10/22 in #400126. Good luck!! 
  • (10/14) A make-up class is scheduled on 10/24. 
  • (10/10) PA1 is released. Please check Assignments tab.
  • (9/23) Our piazza forum has opened. This a Q&A and discussion forum for this course. Please enroll the forum at http://piazza.com/sungkyunkwan_university/fall2019/swe300543. The access code is “ca2019f”.
  • (9/10) Designated seat (Click here!) – Last update: 9/17 (Tues.)
    – If your name is not in this file, please send it by email to minwoo.ahn@csi.skku.edu with the seat number (check this file) you want and your name.
  • (9/1) Let’s have fun with computer architecture!

[General Info]

Class Time: 12:00 ~ 13:15 (Tuesday), 13:30 ~ 14:45 (Thursday)

Room Number : #400112, Semiconductor Building

Official Language : English

Instructor : Prof. Jinkyu Jeong

Course Description: Computer architectures have been drastically evolved since early 1980. Pipelining, cache, and branch prediction have been major features in modern microprocessor design. They are invented for high performance processors first, then equipped in PC processors we are using everyday. In our class, we focus on common computer architectural features for personal computers, servers, and embedded devices. At the end of this course you will understand basic principles on pipelining, cache hierarchies, memory systems, storage, and I/O systems.

Textbook : 

References

Grading: (subject to change)

  • Class attendance: 10%
  • Exams: 25% + 35%
  • Programming Assignments: 30%

TA:

  • Minwoo Ahn (minwoo.ahn@csi.skku.edu)
  • Sunghwan Kim (sunghwan.kim@csi.skku.edu) 

[Schedule]

The following scheduling is tentative and subject to change without notice.

Credit: Some of the slides for this lecture are based on materials provided by the textbook publisher and by Prof. Jae W. Lee at SNU.

Week Topic Reading
Week1 Course Outline
Abstraction (updated)
P&H Chap. 1
Week2 MIPS Instruction Set Architecture (ISA)-1 P&H Chap. 2.1~2.4
Week3 MIPS Instruction Set Architecture (ISA)-2 P&H Chap. 2.5~2.11
Week4 Arithmetic for Computers (Integer) P&H Chap. 3.1~3.4
Week5 Arithmetic for Computers (Floating-point) P&H Chap. 3.5
Week6 Processor: Datapath & Control (updated) P&H Chap. 4.1~4.4
Week7 Pipelining (1) P&H Chap. 4.5~4.6
Week8 Mid-term Exam Week  
Week9 Pipelining (2) (updated)  P&H Chap. 4.7~4.8
Week10 Exceptions P&H Chap. 4.9
Week11 Advanced Instruction-Level Parallelism (ILP) P&H Chap. 4.10
Week12 Memory Hierarchy: Caches (1), (2) P&H Chap. 5.1~5.4
Week13 Memory Hierarchy: Virtual Memory P&H Chap. 5.7
Week14 Memory Hierarchy: A Common Framework P&H Chap. 5.8
Week15 Multicores, Multiprocessors P&H Chap. 6.1~6.5
Week16 Final Exam Week  

 

[Assignments]

Programming Assignment 3

DUE: 12/23 (Mon.), 11:59:59 PM

  • PA3.pdf (last updated: 12/09)
  • pa3_skelaton.zip (last updated: 12/09)
  • If you have any questions, email to TAs (minwoo.ahn@csi.skku.edusunghwan.kim@csi.skku.edu).
  • (Updated) Consider the case of the number of blocks per entry of L1 and L2 cache are the same only. 
  • (12/30) PA3 results are announced (Click here!). Code is (StudentID)%10000.

Programming Assignment 2

DUE: 11/25 (Mon.), 11:59:59 PM

  • PA2.pdf 
  • (edit. Example(1): Number of Data Hazard[2->3] Number of Data Forwarding[2->3], Example(3): Number of Data Hazard[1->2] Number of Data Forwarding[0->1])
  • (Notice) If the hazard is solved as a stall, forwarding always occurs, so only the stall is counted instead of counting as forwarding.
  • PA2.zip
  • Install_Ubuntu_VM.pdf
  • If you have any questions, email to TAs (minwoo.ahn@csi.skku.edusunghwan.kim@csi.skku.edu).
  • (Updated) The initial state of branch predictor is 2’b01 (weakly not taken). Therefore, you should predict branch as not taken when if the branch instruction is not in BTB and the “Prediction Bits” of the entry should be the result of the prediction (i.e., 2’b00 for not taken, 2’b10 for taken).
  • (12/20) PA2 results are announced (Click here!). Code is (your StudentID)%10000. (last updated: 12/20)

Programming Assignment 1

DUE: 10/10 (Thu.), 11:59:59 PM

  • PA1.pdf
  • PA1_SPIM.pdf
  • PA1_skeleton
  • If you have any questions, email to TAs (minwoo.ahn@csi.skku.edu, sunghwan.kim@csi.skku.edu).
  • (Fixed) pa1-3-main.s (Add $t0 register initialization at 110th line)1
  • (11/20) PA1 results are announced (Click here!). Code is (your StudentID)%10000. (last updated: 11/22)

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